TestWay™ - Concurrent engineering

Speed new products to market by conducting test engineering activities concurrently with design activities. By using the TestWay board-level testability analyzer, test engineers can check testability, plan test strategies, predict fault coverage, and assign testpoints during the schematic design stage. The net result is fewer test problems, fewer iterations through layout, lower cost test fixture, higher test quality and faster time to market.

Concurrent engineering means slightly different things to different equipment manufacturers, but a common thread is to have some traditional test engineering functions performed during the design phase. This has seemed like a great idea since it was first proposed at least 20 years ago. Unfortunately, concurrent engineering is easier to think about and talk about than to implement effectively. The key to effective implementation is to have a software tool, such as TestWay, that enables test engineers to work from design (schematic) files efficiently and without disrupting design activities.

Check testability

Plan test strategies

Predict fault coverage

Assign test points

Generate tester files

Benefits of TestWay in Concurrent Engineering

• Higher test coverage by identifying testability issue while designers are still able to make modifications.
• Higher test coverage by identifying optimal test points and back-annotating them into the schematic.
• Fewer iterations through layout because test points can be assigned prior to layout.
• Lower fixture costs because of fewer test points.
• Faster time to market because many test problems can be resolved at the schematic stage.
• Faster time to market because test programs can be substantially developed prior to layout.