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A selection of our customers:
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Latest news:
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10-AUG-2010:
ASTER renews the partnership with Mentor Graphics OpenDoor.
 19-OCT-2009:
PARIS Porte de Versailles Pavillon 7.1
10-NOV-2009 to 13-NOV-2009:
Productronica - Hall A1 stand 232 (Munich, Germany)
13-OCT-2009:
GOEPEL Technology Day - Register to learn how "TestWay" can reduce your board test and manufacturing costs (Southampton, United Kingdom)
06-OCT-2009 to 08-OCT-2009:
Forum de l'Electronique - Hall 1 stand C 57. Free subscription (Paris-Nord Villepinte, France)
23-JUN-2009:
Newsletter: Get a FREE test coverage analysis!
29-MAR-2009 to 02-APR-2009:
Agilent Technologies to Collaborate with ASTER for Seamless Test Coverage Analysis across Test Platforms. Press release. Visit us at IPC APEX Expo, booth #1245. (California, USA)
03 & 05-MAR-2009:
Goepel Technology Days - Visit ASTER during the seminars in the UK. At Cambridge on the 3rd of March, and at Bristol on the 5th of March, 2009.
05-DEC-2008:
Newsletter: ASTER launches "low-cost" coverage analysis
20-NOV-2008:
ASTER renews the partnership with Mentor Graphics OpenDoor.
11-NOV-2008 to 14-NOV-2008:
Electronica - Hall A1 - Stand 549. (Munich, Germany)
24-OCT-2008:
ASTER Technologies introduces a new generation of "easy to use" test coverage analysis tools. Press release
30-SEP-2008 to 02-OCT-2008:
Forum de l'Electronique - Hall 2 Stand 2-N100. (Paris-Nord Villepinte, France)
09-SEP-2008 to 11-SEP-2008:
Autotestcon - Visit ASTER at the Global Test Solutions booth, stand 930. Information & registration (Salt Lake City, USA)
10-JUL-2008:
Success Stories : KONTRON Testimonial. (Boisbriand, Canada)
17-JUN-2008 to 19-JUN-2008:
National Electronics Week - Visit ASTER at the Accelonix booth, Hall 2, Stand D60. (London, United Kingdom)
10-JUN-2008:
First ASTER Chinese Users' Group - Visit us and share users experience and stay informed about the upcoming products development. English version - Chinese version (Shanghai, China)
26-MAY-2008:
May release of the ASTER Newsletter.
19-MAY-2008:
Accelonix appointed as the official distributor for QUAD, within the UK and Central Europe.
08-APR-2008 to 10-APR-2008:
"Is a board 'good' because the test passes?", technical paper on Board Test Coverage Analysis presented at the Aerospace Testing Seminar 2008. (California, USA)
28-FEB-2008:
Publication of the article Quad - Une solution dédiée rationalise le contrôle de la qualité des cartes in the french magazine 'Electronique International'. (France)
19-FEB-2008:
ASTER appoints Testforce as Distributor in Canada. (Toronto, Canada)
13-NOV-2007 to 16-NOV-2007:
Productronica - Hall A1 - Stand 452 (Munich, Germany)
25-SEP-2007 to 27-SEP-2007:
Electronics Forum - Hall 7.2 - Stand R98 (Paris, France)
22-JUN-2007:
ASTER Technologies benefit from Microsoft Empower to develop QuadView.
15-MAY-2007 to 17-MAY-2007:
Nepcon UK - Stand G46 (Birmingham NEC, United Kingdom)
15-MAY-2007:
ASTER and GOEPEL announce a collaboration for CASCON ScanVision III development.
02-MAY-2007:
May release of the ASTER Newsletter.
28-FEB-2007:
Boundary Scan Day - organised by GOEPEL Electronic (Cambridge University, United Kingdom)
28-FEB-2007:
ASTER and GOEPEL announce DfT Rules Checking collaboration
08-FEB-2007:
Test In Production Event - organised by ACCELONIX, NL (Eindhoven, The Netherlands)
23-JAN-2007:
Read article on "Are your board designs testable?" published on the EngineerLive website.
16-OCT-2006:
ASTER Technologies and TEMENTO Systems announce a strategic partnership
14-SEP-2006:
Functional Board Test - Defect Coverage Analysis, at the 5th IEEE Board Test Workshop. (Fort Collins, Colorado, USA)
19-JUN-2006:
ASTER appoints RDT as Distributor in Israel. (Tel Aviv, Israel)
03-APR-2006:
ASTER opens Direct sales and support Office in the UK. ASTER Technologies Ltd is managed by Peter COLLINS who becomes the sales and marketing manager.
>> More...
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TestWay™ - Custom Rules
Adapt the TestWay™ testability analyzer
to your design and manufacturing processes using custom rules.
While TestWay includes a large number of built-in rules, some users desire
to add their own rules (design, DfT, testability). Perhaps some custom ASIC
requires special design rules, or perhaps the manufacturing process imposes
some constraints.
Maybe there are some design guidelines intended to improve quality or
reduce manufacturing costs. All major electronics manufacturers have
distinctive practices. Some differences are historical, others are clearly
aimed at gaining competitive advantage. TestWay custom rules permit
users to confirm that their distinctive practices are being followed
correclty.
Your own requirements in order to check:
- Pin or device oriented rules.
- Technological requirements (Design rules).
- In-Circuit programming for flash EEPROM or FPGA.
- Specific rules for ASIC.
- Any customer's rules!
You never have the same problem twice as TestWay capitalizes your
knowledge through the customer’s rules.
Simple, natural language
Unlike other approaches which the C language or SQL database queries,
TestWay uses simple natural language to describe new rules.
Wild card characters (? and *) simplify the process even further by
allowing many devices or pins to be covered by one rule.
Examples
! Design and EMC rules
Pin (IN&DIGITAL) is not floating.
Pin (NC) is connected to GROUND.
! DfT - PLD and FPGA testability
Pin ISPEN* of device (ISPLSI) is connected to a pull-up.
Pin PWRDWN? (IN) of device XC30?? is accessible.
Pin M0 (IN) of device XC30?? is accessible.
Pin M1 (IN) of device XC30?? is accessible.
Pin M2 (IN) of device XC30?? is accessible.
! DfT - Check In-circuit programming of EEPROMs
Pin A9 of device AM27C010 is protected by a device (DIODE).
Pin CE_ of device AM27C010 is accessible.
Pin OE_ of device AM27C010 is accessible.
Pin PGM_ of device AM27C010 is accessible.
Pin VPP of device AM27C010 is protected by a device (DIODE).
Pin VCC of device AM27C010 is protected by a device (DIODE).
Pin A9 of device AM29F040 is protected by a device (RESISTOR).
! DfT - Check specific requirements of ASICs
Pin TNI of device PASS (ASIC) is connected to a pull-up.
Pin TRST of device (ASIC) is connected to a pull-down.
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